1. Field of the Invention
The present invention relates to an in-plane switching (IPS) mode liquid crystal display (LCD) device and to a method for fabricating an IPS mode LCD device that minimizes a number of masks used in the fabrication process.
2. Description of the Related Art
A liquid crystal display (LCD) device serves to display an image by controlling an arrangement of liquid crystal molecules having a dielectric anisotropy and a refractive anisotropy by using an electric field. A polarized light is prevented from being transmitted or allowed to be transmitted by the liquid crystal molecules according to an arrangement direction of the liquid crystal molecules. Therefore, if the arrangement direction of the liquid crystal molecules is controlled, the display can be controlled. Since the arrangement direction of the liquid crystal molecules is controlled by the applied electric field, the LCD device is provided with electrodes for applying the electric field to the liquid crystal molecules.
The LCD device comprises an array substrate in which pixel electrodes for applying an electric field to liquid crystal molecules are arranged in a matrix form, a color filter substrate facing the array substrate for displaying colors, and a liquid crystal layer formed between the array substrate and the color filter substrate.
Generally, the LCD device is implemented in a twisted nematic (TN) mode in which the liquid crystal molecules are twisted as a spiral shape which has the advantages of a fast operation speed and a low driving voltage driving requirements. The TN mode LCD device includes an array substrate, a color filter substrate facing the array substrate, and a liquid crystal layer formed between the array substrate and the color filter substrate. In the array substrate, pixel electrodes are provided for applying the electric field to the liquid crystal molecules are arranged in a matrix form.
The TN mode LCD device has a disadvantage that a viewing angle is narrow. This is due to a dielectric characteristic of liquid crystal in which vertical electric field is applied to the liquid crystal molecules. As a result, brightness and picture quality of the screen display significantly varies according to a user's viewing direction.
Accordingly, an IPS mode LCD device capable of improving a viewing angle has been introduced. In the IPS mode LCD device, the electric field is applied in a horizontal direction to the array substrate. That is, liquid crystal is driven in a direction parallel to the plane of the array substrate by the electric field.
In order to horizontally drive the liquid crystal on the substrate, the IPS mode LCD device is provided with pixel electrodes for applying the electric field to the liquid crystal molecules and common electrodes on the same substrate.
Hereinafter, a structure of a unit pixel of a related art IPS mode LCD device will be explained with reference to FIG. 1.
The unit pixel is an area defined by a plurality of gate lines 101 and a plurality of data lines 102 crossing the gate lines 101. The unit pixel is provided with at least one common electrode 105 branching from a common electrode line 104. The common electrode 105 branches in a direction parallel with the gate lines 101. Also, the unit pixel is provided with at least one pixel electrode 106 that extends in a direction parallel with the common electrode 105. The common electrode 105 and the pixel electrode 106 are formed on the same substrate to enable the horizontal electric field to be applied to the liquid crystal.
The unit pixel is provided with a switching device, a thin film transistor 103 for controlling the unit pixel at a corner thereof. The thin film transistor 103 is formed at each intersection between the gate lines 101 and the data lines 102, and is respectively connected to the gate lines 101 to which scan signals are applied and to the data lines 102 to which pixel signals are applied. Also, the thin film transistor 103 is connected to the pixel electrode 106 to deliver the pixel signal from the data line 102 to the pixel electrode 106 under the control of the scan signal from the gate line 101. The pixel electrode 106 in conjunction with the common electrode 105 applies the horizontal electric field to liquid crystal.
The pixel electrode 106 partially overlaps with the common electrode line 104 to form a storage capacitor.
Hereinafter, a structure of the unit pixel of the related art IPS mode LCD device will be explained with reference to FIG. 2.
FIG. 2 is a sectional view taken along line I-I in FIG. 1. Referring to FIG. 2, the unit pixel is provided with a thin film transistor 103 at a corner thereof. The common electrode 105, the common electrode line 104, and a pixel electrode 208 (106 in FIG. 1) are formed in the unit pixel.
A gate electrode 202, the common electrode 105, and the common electrode line 104 are formed on a glass substrate 201. Since the gate electrode 202 branches from the gate line 101 and the common electrode 105 branches from the common electrode line 104, the gate line 101, the gate electrode 202, the common electrode line 104, and the common electrode 105 are formed on the same glass substrate 201. The gate electrode 202, the gate line 101 (not shown in FIG. 2), the common electrode 105, and the common electrode line 104 are covered by a gate insulating layer 203.
An active layer 204 is formed over the gate electrode 202 such that the gate insulating layer 203 is disposed therebetween. Also, a source electrode 206s and a drain electrode 206d are respectively formed over the active layer 204 and an ohmic contact layer 205 is disposed therebetween. The source electrode 206s and the drain electrode 206d are electrically separated from each other. Only the active layer 204 disposed between the source electrode 206s and the drain electrode 206d constitutes a channel. The gate electrode 202, the active layer 204, and the source/drain electrodes 206s and 206d constitute the thin film transistor 103.
A passivation layer 207 is formed on the source electrode 206S and the drain electrode 206D, thereby forming the lower thin film transistor.
A pixel electrode 208 (106 in FIG. 1) is formed on the passivation layer 207, and is connected to the drain electrode 206D through the passivation layer 207. The pixel electrode 208 is farther formed over the common electrode line 104 forming a storage capacitor together with the common electrode line 104. The pixel electrode 208 is formed to be parallel with the gate line 101 and also parallel with the common electrode 105 formed on the same layer.
Accordingly, the pixel electrode 208 connected to the thin film transistor 103 and the common electrode 105 branching from the common electrode line 104 are horizontally formed in the unit pixel, thereby applying the horizontal electric field to the liquid crystal layer (not shown).
Hereinafter, a method for fabricating the related art IPS mode LCD device will be explained with reference to FIGS. 3A to 3D, in which each component of the unit pixel will be explained.
As shown in FIG. 3A, a metal thin film is deposited on the substrate 201, and then the gate electrode 202, the common electrode 105, and the common electrode line 104 are patterned by using a first mask in a photolithography process. Next, the gate insulating layer 203 for covering the gate electrode 202, the common electrode 105, and the common electrode line 104 is formed.
As shown in FIG. 3B, a semiconductor layer and an ohmic contact layer are sequentially formed on the gate insulating layer 203, and then the active layer 204 is patterned by using a second mask in the photolithography process. The ohmic contact layer 205 remains on the active layer 204.
As shown in FIG. 3C, a conductive layer is deposited on the active layer 204, and then the source and drain electrodes 206s and 206d are formed by using a third mask.
Next, as shown in FIG. 3D, the passivation layer 207 is formed on the source and drain electrodes 206s and 206d, and then the passivation layer 207 on the drain electrode 206d is removed by using a fourth mask to expose the drain electrode 206d. 
Next, a transparent electrode material such as ITO is deposited on the passivation layer 207, and then the pixel electrode 208 is patterned by using a fifth mask. The pixel electrode 208 is patterned to partially overlap with the common electrode line 104 to form the storage capacitor.
The conventional method for fabricating an IPS mode LCD device has at least the following disadvantage. Since many expensive masks are used, the fabrication process is long and the fabrication cost is increased.